avr_interface Project Status (05/10/2013 - 09:42:09)
Project File: Mojo-Clock.xise Parser Errors: No Errors
Module Name: avr_interface Implementation State: Programming File Not Generated
Target Device: xc6slx9-2tqg144
  • Errors:
 
Product Version:ISE 14.4
  • Warnings:
 
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment:  
  • Final Timing Score:
  
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
CPLD Fitter Report (Text)     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated
ISIM Simulator LogOut of DateMon Feb 11 13:13:32 2013
WebTalk ReportCurrentFri May 10 09:42:08 2013
WebTalk Log FileCurrentFri May 10 09:42:09 2013

Date Generated: 05/10/2013 - 09:42:09